Weekly News | Supply chain trends in Semiconductor industry #183

183rd of weekly news

01

On September 8, the FCC took actions to withdraw FCC recognition of seven Chinese test labs including Chongqing Academy of Information and Communications, CQC Internet of Vehicles Technical Service Co. Ltd., CVC Testing and others to prohibit them from providing testing certifications for electronic equipment exported to US. Since the new rules were issued in May, the expired FCC recognitions of four Chinese testing labs have not been renewed. Data shows that Chinese testing labs undertake about 75% of global consumer electronics testing. The sanction means that relevant manufacturers have to shift to overseas testing labs, which will prolong the average certification period by 2-4 weeks and add compliance costs by 10%-15%, thus starting a new round of supply chain turbulence.

FCC will extend the science and technology game from chips and devices to testing, aiming to precisely strike the “last mile” of China's ICT export. In the short term, manufacturers of mobile phones, network communication, and vehicle electronics will face the delayed order delivery and additional costs, and the third-party testing labs of the Southeast Asia will receive more testing orders transferred from China. In the mid and long term, China will speed up establishing independent testing standards and mutual recognition systems. This will drive the development of domestic certification institutions, third-party testing labs and alternative chip solutions simultaneously, and the valuation of the segment is expected to be reshaped.

02

On September 9, the “3DIC Advanced Packaging Manufacturing Alliance”, led by both TSMC and ASE, debut in Taiwan. The Alliance has 34 members at present, and it will have 37 members by the end of the year, covering various segments such as wafer, packaging and testing, equipment, materials, EDA/IP, and system terminals. The Alliance established one pilot line in Taichung and one in Kaohsiung, respectively, with the goals of raising the yield of 3DIC to 90% by 2026 and reducing costs by 30%, and it has released the world's first open 3DIC design reference process. With one generation of new AI chip released each year, the Alliance, taking unified design specifications, co-building supply chain, developing Hybrid Bonding standards and green cycles as four tasks, will invest US$1.5bn in three years to create 1,800 patents, reduce the production period by 40%, and focus on 1.6 Tb/s and 0.5 pJ/bit AI storage integrated packaging, providing one-stop delivery from wafer to systems.

TSMC has deeply integrated SoIC™ and CoWoS® with RDL and SiP of ASE to remove the barriers from front-end data to back-end data, and changed the role of advanced packaging from “supporting role” to “main engine of performance”. The Alliance takes standardization and localization to meet the demand of “overflow” of AI orders, and pushes forward R&D, capacity, and mass production simultaneously, to “lock” customers and rivals at the same time. Moreover, it will make use of the patent pool and pilot lines to seize the market of 2nm + 8-layer HBM4, so as to consolidate Taiwan's global 3DIC hub position. In the short term, it can alleviate the shortage of CoWoS capacity; in the long term, it will reshape the competition logic of the semiconductor industry – to shift from “process node” to “ecological speed”. If the manufacturers located in Chinese mainland cannot quickly join the standard system of the Alliance, they will be further marginalized in the AI, automotive, medical and other high-end packaging market.

03

On September 9, Nvidia unveiled Rubin CPX, a new generation of AI accelerator, at GTC, and will mass produce it by 2026. Rubin CPX adopts a separated inference architecture and distributes “context understanding” and “content generation” to two GPUs. As a result, each Rubin GPX delivers up to 30 petaflops (NVFP4) and features 128GB memory to process 1 million tokens, equal to 1-hour HD video or millions of lines of codes, and achieves three folds faster attention capabilities compared with GB300 NVL72 systems. The whole cabinet of Vera Rubin NVL144 CPX was also released with 144 Rubin GPUs + 144 CPX GPUs, which enable 8 exaflops AI computing power and 1.7Pb/s memory bandwidth, with US$5bn in token revenue for every US$100mn invested, as announced by Nvidia. The new product focuses on AI video generation, extra-long code completion, and multi-modal LLM inference and can be mixed with existing servers without the need to rebuild existing data centers. The message stimulated the stock price of Nvidia to sharply rise 2% in the pre-market trading and drove AI ETF to rise simultaneously.

Rubin CPX broke down the reasoning chain into “read” and “write” and achieved hardware-level pipelining, significantly reducing long-context latency, opening up business space for extra-long input scenarios such as video, code, and law; and it continues Nvidia’s “Data Center Cabinets as Money Printing Machines” strategy, binding customers with very high memory bandwidth and interconnect speeds. Its marketing pace in 2026 not only gives the software ecosystem adaptation period but also leaves a ramp-up window for TSMC’s 4NP and next-gen GDDR7, so AMD, Intel and domestic chipmakers cannot catch up with Nvidia in the short term. If Chinese LLM companies hope not to lag behind on the tracks of long text and multi-mode LLM, they should target at Rubin CPX cabinet or accelerate self-developing chips in advance. Otherwise, they will face a new bottleneck of “computing power as the upper limit of LLM”.

04

On September 10, Tokyo Electron President Toshiki Kawai visited Hsinchu, Taiwan during SEMICON Taiwan to meet with TSMC Chairman C. C. Wei to apologize in person for TSMC’s former staff involving the theft of TSMC 2nm process secrets and proposed a plan to address the data leak case. The incident was that a former engineer of TSMC quitted his job and joined TEL. The engineer, together with two employees of TSMC, took more than 400 photos about the key process, aiming to improve TEL’s etching performance. The three persons have been prosecuted and sentenced to seven to fourteen years. TEL temporarily canceled its technology release conference at the exhibition venue and only kept its booth to show a low-key gesture. However, TSMC emphasized “zero tolerance”, insisted on judicial accountability, and accelerated the upgrading of internal information security.

TEL executives rarely bowed down, highlighting that equipment manufacturers’ reliance on major clients and the “crown-like” value of 2nm process technology. In the short term, TSMC may take the opportunity to build more stringent firewalls, require giving priory to supplying machines and even giving compensation so as to strengthen its right of speech in the supply chain. In the mid and long term, the risk of leaking advanced process know-how not only comes from the flow of talents but also from the conspired “precision crime” of segments like equipment and materials. In the future, different countries/regions may tighten cross-border technical collaboration and export reviews, and the window for the manufacturers of Chinese mainland, Japan, and third-party chipmakers to access cutting-edge processes will be further narrowed and the cost of global “trust chain” has risen again.

05

Recently, YMTC’s Phase III (Wuhan) Integrated Circuit Co., Ltd. was incorporated in Wuhan Optics Valley, with a registered capital of RMB20.72bn, and YMTC Chairman Chen Nanxiang will act as the legal representative of the new company. The equity structure of the company shows that YMTC contributed RMB10.4bn, accounting for 50.19% equity interest of the company, and Hubei Changsheng Phase III Investment and Development Co., Ltd., a state-owned assets platform in Hubei, contributed RMB10.32bn, accounting for its 49.81% equity interest, forming a “technology + capital” two-wheel drive pattern. The company’s business scope covers manufacturing, design, sales of integrated circuits, chip sales and other parts of the whole industry chain. The company is considered as a second major expansion of YMTC after its previous expansions (Phase I: RMB37bn; Phase II: RMB25bn) in the field of 3D NAND. The industry forecast that, if the percentage of homemade equipment of the Phase III production line maintains more than 85%, it will generate orders worth about RMB20bn for domestic equipment and materials enterprises and will help YMTC to increase its share in the global market from 8% to 15% by the end of 2026.

06

On September 8, Beijing Jingfei Semiconductor announced that it completed stripping 12-inch SiC wafer with self-developed laser stripper, which was the first time in China. The laser device, optical pickup, and the motion platform are all homemade, and have been validated at 6/8 inch production lines of several customers, showing that its performance benchmarks the international level. Compared to conventional diamond jigsaw, the laser stripper can reduce loss rate from 30% to less than 5%, and each unit of wafer can additionally produce 400 pcs of vehicle-purpose MOSFET. In addition, it increases the usable area of 12-inch wafer four folds compared to that of 6-inch wafer, thus reducing the cost of each chip by 30-40%. At the same time, the equipment cost is only one third of its European counterpart, and the lead time is halved. Jingfei has received orders arranged for 2027 from domestic top substrate factories. It plans to deliver 20 laser devices this year and expand production to 50 sets next year. At the same time, it will start overseas market certification. According to the predicts of the agency, if domestic manufacturers can produce 500,000 units of 12-inch SiC wafer by 2026, they can save US$1.5bn cost by using laser stripping, thus speeding up the popularization of SiC devices in the fields of new energy vehicles, PV converter and others.

07

On the evening of September 9, the domestic AI chip leader Cambricon Technologies (688256.SH) announced that its application of private placement with a total amount not exceeding RMB3.985bn was approved by the CSRC. The raised funds will be mainly used for the “LLM-oriented chip platform”, “LLM-oriented software platform” and supplementing its working capital. The project construction period will be 36 months. At the same time, the company also set up a wholly-owned subsidiary in Hohhot, targeting at the demand of 100,000 P-level intelligent computing centers of the "East-West Computing Resource Allocation” hub. In H1 2025, Cambricon Technologies obtained revenue of RMB2.88bn, up 43 folds YoY, and its net profit attributable to parent company reached RMB1.04bn, turning losses to gains. At present, ByteDance has pre-ordered 200,000 cloud AI chips. Similarly, Alibaba, Tencent, Baidu and other cloud manufacturers have also decided to purchase more domestic computing power, and its order visibility has extended to 2026. The agency predicts that the company’s cash flow will improve significantly after completing the private placement, which will help to ease its capacity bottlenecks and accelerate the production of new 280A/590 chips. As a result, its annual revenue is expected to reach RMB5bn - 7bn.