11.0 DC Motor Driver
Circuit 1 Circuit 2 Circuit 3 Circuit 4 Circuit 5 Circuit 6 Circuit 7 Circuit 8 Circuit 9 Circuit 10 Circuit 11 Circuit 12 Row Status
RQT-191001-009988 EC-0240 WORST CASE CIRCUIT ANALYSIS Evidence Comment/Issues Open Date Close Date Ford HW TS Reviewer Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence
11.1 Provide the worst-case analysis of each output circuit per section 9.0 (included below) with the additional(however note that the DC motor driver output comprises two output pins as it is both a HS and LS output): OPEN
11.1.1 Functional over the required environmental range (provides the required transfer function) of module voltage and temperature. Include external ground offsets, harness or switch leakage resistances, harness connector and series wiring resistances, wiring capacitances, internal PCB trace resistances, internal common-mode voltage drops or offsets in the power and ground to the circuit, internal PCB leakage to adjacent potentials and any other parasitics. OPEN
11.1.2 Transistors/FET's biasing (devices are ON/OFF as required) OPEN
11.1.3 Output voltage OPEN
11.1.4 Output current capability(Steady state & Inrush), IT graphical performance capability OPEN
11.1.5 Rise/fall times of output OPEN
11.1.6 Loads ON/OFF as required OPEN
11.1.7 Transfer function accuracy (e.g., duty cycle, frequency) OPEN
11.1.8 Leakage current of output OPEN
11.1.9 Power dissipations OPEN
11.1.9.1 Conduction, Switching (t_rise, t_fall, C_oss, C_iss) OPEN
11.1.10 Peak junction temperatures; Confirm instantaneous rise =< 60ºC OPEN
11.1.11 PCB temperatures OPEN
11.1.12.1 Solder joints OPEN
11.1.12.2 Traces, vias OPEN
11.1.13 Protection from transients (e.g., CI 220, load dump) OPEN
11.1.14 Protection from overvoltage stress (19.95V, reverse battery, RQT-002603-705248) OPEN
11.1.15 Protection from double-battery (jump start) OPEN
11.1.16 Short-to-battery and/or short-to-ground, shorted load protection. Note: a short circuit condition analysis includes parasitic wiring inductance (e.g., 10m and 10uH). OPEN
11.1.17 Diagnostic circuit detection limits or thresholds (short-to-battery, short-to-ground, open circuit) OPEN
11.1.18 Operation during battery dips including start/stop crank and drop-out OPEN
11.1.19 Retry strategy (FET Protection Strategy) OPEN
11.1.20 Diagnostic circuits: peak injection currents into microprocessor or interfacing IC under normal input as well as transients. Include fault conditions. OPEN
11.1.21 Clamping for turn-off of the motor loads under the following voltage conditions and at -40C, 25C and maximum ambient temperature assuming the loads are all stalled simultaneously and the device goes into tri-state without braking state of the motors
11.1.21.1 Maximum operating voltage (e.g., 16V, 54V, etc.) OPEN
11.1.21.2 19.95V OPEN
11.1.21.3 27V (maximum temperature 55C) OPEN
11.1.21.4 30V (load dump) OPEN
11.1.21.5 Device internal HVI/LVI OPEN
11.1.22 Power dissipation of any reverse battery protection components in supply, ground circuits or measurement circuits OPEN
11.1.23 Power dissipation of any reverse battery diodes in the output under soft-short conditions OPEN
11.1.24 Digital signal levels compatibility for integrated circuit/smart driver interface OPEN
11.2 Accuracy of any current measurement circuits. Reference the Analog Inputs for expectations OPEN
11.3 Sneak path: Show the protection that prevents a sneak path during module GND disconnect so that the load is not activated and there is no wake up to any ignition line. OPEN
11.4 Show that any driver IC's that control the output are properly configured OPEN
11.5 Refer to the CDS (if applicable to this module) or HW specification for WCCA assumptions OPEN
11.6 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
11.7 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
11.8 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
11.9 Measurements
11.9.1 Device temperatures with worst-case loading OPEN
11.9.2 Items per latest level Hardware Review Checklist OPEN
11.9.3 Vout, Iout OPEN
11.9.4 Accuracy of transfer fun
12.0 Illumination - Internal
Circuit 1 Circuit 2 Circuit 3 Circuit 4 Circuit 5 Circuit 6 Circuit 7 Circuit 8 Circuit 9 Circuit 10 Circuit 11 Circuit 12 Row Status
RQT-191001-009988 EC-0240 WORST CASE CIRCUIT ANALYSIS Evidence Comment/Issues Open Date Close Date Ford HW TS Reviewer Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence
12.1 Provide the worst-case analysis of each illumination circuit. Functional over the required environmental range of module voltage and temperature. OPEN
12.1.1 Provide the illumination output intensity. Show the target Nominal optical output and the low and high tolerance OPEN
12.1.2 Normalize the LED parameters to the LED data sheet curves. Need to consider application LED current, LED binning, pulse width modulation, etc.). OPEN
12.1.3 Transistors/FET's biasing (devices are ON/OFF as required) OPEN
12.1.4 Show the Driver output voltage at the output. Is the output voltage greater than total max Vf(s)? OPEN
12.1.5 Output current capability of driver OPEN
12.1.6 NTC derating curve region of operation, hysteresis entering and exiting the derating region OPEN
12.1.7 Loads inrush analysis from ON/OFF as required OPEN
12.1.8 Enable signal analysis (e.g., duty cycle, frequency, slew rate, etc.) OPEN
12.1.9 Leakage current of output (no glowing of LED's). Include shunt bleed resistor calculations OPEN
12.1.10 Operation during battery dips including start/stop crank and drop-out OPEN
12.1.11 Illumination intensity flicker during dropouts and load changes OPEN
12.1.12 Show that any driver IC's that control the illumination output are properly configured OPEN
12.1.12.1 Threshold analysis of interface to microprocessor OPEN
12.1.12.2 Timing analysis of interface to microprocessor OPEN
12.1.12.3 Start up timing analysis to steady state OPEN
12.1.12.4 Show LED Configuration, number of strings, number of LEDs per string OPEN
12.1.12.5 Driver IC configuration data OPEN
12.1.13 Illumination color variation analysis (e.g., LED current, LED binning, pulse width modulation impacts, etc.)
12.2 Stress Analysis
12.2.1 Power dissipations OPEN
12.2.2 Peak junction temperatures OPEN
12.2.3 PCB temperatures OPEN
12.2.4 Solder joints OPEN
12.2.5 Traces, vias OPEN
12.2.6 Protection from transients (e.g., CI 220, load dump) OPEN
12.2.7 Protection from overvoltage stress (19.95V, reverse battery, RQT-002600-705248) OPEN
12.2.8 Protection from double-battery (jump start) OPEN
12.3 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
12.4 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
12.5 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
12.6 Measurements
12.6.1 Thermal image of board(s) at room temperature with worst-case loading OPEN
12.6.2 Thermal couple data with full housings based on thermal image hot spots OPEN
12.6.3 Scope traces of input/output voltage/current. Include inrush, startup, and steady state. OPEN
12.6.4 IIlluminous intensity range per light source (e.g. LED, bulb) over temperature OPEN
12.6.5 Illuminous flux range over temperature, for each lamp assembly function. OPEN
12.6.6 Output rise/fall times OPEN
13.0 Switches - Internal
Circuit 1 Circuit 2 Circuit 3 Circuit 4 Circuit 5 Circuit 6 Circuit 7 Circuit 8 Circuit 9 Circuit 10 Circuit 11 Circuit 12 Row Status
RQT-191001-009988 EC-0240 WORST CASE CIRCUIT ANALYSIS Evidence Comment/Issues Open Date Close Date Ford HW TS Reviewer Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence Evidence
13.1 Provide the worst-case analysis of each switch circuit OPEN
13.1.0 Functional over the required environmental range (provides the required transfer function, e.g. detection of switch closure) of module voltage and temperature. Include internal PCB trace resistances, internal common-mode voltage drops or offsets in the power and ground to the circuit, internal PCB leakage to adjacent potentials and any other parasitics. OPEN
13.1.1 Show matrix scheme. Any two simultaneous selections must be resolved OPEN
13.1.2 Transistors/FET's/LED biasing (devices are ON/OFF as required) OPEN
13.1.3 Output levels to microprocessor or interfacing IC. Use worst-case close and open switch resistances per RQT-191001-009861 (EC-0013). OPEN
13.1.4 Transfer function - Timing Analysis OPEN
13.1.4.1 Debounce filter OPEN
13.1.4.2 Rise/fall times to interfacing IC OPEN
13.1.4.3 Maximum encoder rotational speed OPEN
13.1.5 Analog circuit transfer function accuracy (see analog circuits) OPEN
13.1.5.1 Timing analysis of interface OPEN
13.1.5.2 Software limits for thresholds OPEN
13.1.6 What are the minimum switch wetting current requirements? Do the circuit loading resistances, capacitances, and wetting current for switches meet specifications (e.g., RQT-180300-017514, Hardware spec, etc.) OPEN
13.1.7 Operation during battery dips including start/stop crank and drop-out OPEN
13.1.8 Show that any IC's that read the switches are properly configured OPEN
13.1.8.1 Threshold analysis OPEN
13.1.8.2 Timing analysis of interface OPEN
13.2 Stress Analysis
13.2.1 Power dissipations OPEN
13.2.2 Peak junction temperatures OPEN
13.2.3 PCB temperatures OPEN
13.2.3.1 Solder joints OPEN
13.2.3.2 Traces, vias OPEN
13.2.4 Protection from transients (e.g., CI 220, load dump) OPEN
13.2.5 Protection from overvoltage stress (e.g., 19.95V, reverse battery, RQT-002603-705248) OPEN
13.2.6 Protection from double-battery (jump start) OPEN
13.3 This item is reserved for a product specific item that may be added by WCCA reviewer.
13.4 This item is reserved for a product specific item that may be added by WCCA reviewer.
13.5 This item is reserved for a product specific item that may be added by WCCA reviewer.
13.6 Measurements
13.6.1 Device temperatures with worst-case loading OPEN
13.6.2 Items per latest level Hardware Review Checklist OPEN
13.6.3 Vout, Iout OPEN
13.6.4 Accuracy of transfer function OPEN
13.6.5 Rise/fall times & switch bounce at microprocessor or interfacing IC input OPEN
13.6.6 Encoder maximum rotation response (up to ~ 5000 degrees per second spin) OPEN
13.6.7 Encoder response if stuck at position between detents OPEN
14.0 Potentiometer
Circuit 1 Circuit 2 Row Status
RQT-191001-009988 EC-0240 WORST CASE CIRCUIT ANALYSIS Evidence Comment/Issues Open Date Close Date Ford HW TS Reviewer Evidence
14.1 Provide the worst-case analysis of each potentiometer circuit, per section 6.0 OPEN
14.0.1 Show that each required detent or position can be detected over the required environmental range of module voltage and temperature. OPEN
14.1.1 Additional considerations (Reference: Analog circuit 6.0) OPEN
14.1.1.1 Software A/D detection errors OPEN
14.1.1.2 Potentiometer characteristics OPEN
14.1.1.2.1 Linearity OPEN
14.1.1.2.2 Backlash OPEN
14.1.1.2.3 Contact resistance OPEN
14.1.1.2.4 Temperature coefficient of resistance OPEN
14.1.1.3 Housing mechanical tolerance stack-ups OPEN
14.2 Stress Analysis
14.2.1 Power dissipations OPEN
14.2.3 PCB temperatures OPEN
14.2.4 Solder joints OPEN
14.2.5 Traces, vias OPEN
14.3 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
14.4 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
14.5 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
14.6 Measurements
14.6.1 Device temperatures with worst-case loading OPEN
14.6.2 Items per latest level Hardware Review Checklist OPEN
14.6.3 Accuracy of transfer function OPEN
17.0 Microprocessor/External Memory
Microprocessor (internal or external memory) External Memory 1 External Memory 2 External Memory 3 Row Status
RQT-191001-009988 EC-0240 WORST CASE CIRCUIT ANALYSIS Evidence Comment/Issues Open Date Close Date Ford HW TS Reviewer Evidence Evidence Evidence
17.1 Provide the worst-case stress analysis for the microprocessor (If not covered elsewhere): OPEN
17.1.1 List all required supply voltages and ranges, and environmental conditions. OPEN
17.1.1.1 List actual supplied voltage tolerances or ranges OPEN
17.1.2 Calculate the following
17.1.2.1 Power dissipations (include power loss of micro outputs in total micro power) OPEN
17.1.2.2 Peak junction temperatures OPEN
17.2 Provide the worst-case functional analysis for the microprocessor (If not covered elsewhere): OPEN
17.2.1 Input and output thresholds for interfacing IC or circuits OPEN
17.2.2 Diagnostic circuits: peak injection currents into microprocessor or interfacing IC under normal input as well as transients. Include fault conditions. OPEN
17.3 Provide the analysis showing that the following parts were selected correctly for the microprocessor (If not covered elsewhere):
17.3.1 Crystal or resonator capacitors OPEN
17.3.2 Power supply decoupling capacitors per datasheet OPEN
17.3.3 Provide PDN (power distribution network) analysis results. Include DC voltage drop and impedance vs frequency analyses. OPEN
17.4 Show the following requirements are met:
17.4.1 Microcontroller Selection and Scalability
17.4.1.1 Where does the microcontroller/microprocessor fall in the family scalability? Are there upward and downward compatible components? Has core/D&R engineer approved if no upward/ OPEN
17.4.2 Microcontroller Clock Speed and Power Supply
17.4.2.1 "Show the maximum clock speed capability of the microcontroller/CPU
Make sure to consider the total power supply load (microcontroller and all the other loads) and the maximum selected clock speed when calculating the maximum power supply capability." OPEN
17.4.2.2 Show the target clock speed including total tolerances of the microcontroller/CPU OPEN
17.4.3 Microcontroller Flash Memory
17.4.3.1 The microcontroller shall contain FLASH memory for program code and calibrations to be used for development. OPEN
17.4.4 Microcontroller Resource
17.4.4.1 The microcontroller, at a minimum, shall have
17.4.4.1.1 The minimum memory specified in the eSOW with an upgrade path to a microcontroller with more memory shall be protected for. Memory space must be protected per RQT-191001-009915. OPEN
17.4.4.1.2 Sufficient FLASH space reserved for method 3 configurations (any others?). OPEN
17.4.4.1.3 CAN controller that supports HS or MS-CAN if CAN network, if required OPEN
17.4.4.1.4 Show A/D minimum resolution. Is the A/D resolution adequate for the design? OPEN
17.4.4.1.5 5V I/O. Other voltages may be used. The WCCA must demonstrate all requirements/specifications are met. OPEN
17.4.4.1.6 LVI for all I/O supplies OPEN
17.4.4.1.7 Internal core LVI & reset OPEN
17.4.4.1.8 PORF (power on reset flag) bit OPEN
17.4.4.1.9 Internal watchdog timer OPEN
17.4.4.1.10 Non-maskable interrupt (reset pin) OPEN
17.4.4.1.11 ECC for FLASH, RAM, register arrays OPEN
17.4.4.1.12 Internal clock (in case of external clock failure) OPEN
17.4.5 Non-Volatile Memory
17.4.5.1 Is the module required to store calibration constants, Diagnostic Trouble Codes (DTCs), etc.? (RQT-191001-009902) If yes, does the design have non-volatile memory for calibration constants, DTCs, etc.? OPEN
17.4.6 Data write protection
17.4.6.1 What is the NVM write time? How long does software take before power dropout is detected? Does the hardware have enough time to complete the NVM write? Once the NVM modification (write/erase/erase-write) has started, the hardware must supply enough Holdup Power to ensure there is enough time to complete the modification – even if the battery is disconnected at the exact moment the write starts. The hardware/software design shall ensure successful completion of any NVM modification of a single NVM cell – even if the module loses power at the same time as the NVM modification starts. OPEN
17.5 PCB Layout
17.5.1 Supplier layout guidelines shall be followed for PCB power supply layout/routing, power supply filter capacitor placement/routing and any PLL filter component placement/routing OPEN
17.5.2 Has the micro supplier reviewed the micro schematic and PCB layout? Provide evidence. OPEN
17.5.3 Has a design responsible EMC expert/specialist reviewed PCB layout? Provide evidence. OPEN
19.0 Module Thermal Study
Evidence Comment/Issues Open Date Close Date Ford HW TS Reviewer Row Status
19.1 Provide a Summary Table of all calculated Junction Temperatures. The WCCA calculations should assume the maximum ambient temperature from the product specification or the Maximum Design Temperature (MDTs) provided from the RQT-002600-009613, whichever is higher. Assume the internal module self-heating is 10C or the worst case value from module thermal simulation. This self-heating may be as high as 30C depending on the amount of internal power dissipation and module thermal design. OPEN
19.1.1 Note per EC-0240: Any device that has results within 10% of the parts temperature rating shall be thermo-coupled during the thermal measurement characterization testing (in 19.5/19.5.1) and verify the temperature of the device is acceptable OPEN
19.1.2 Provide the module thermal simulation results. OPEN
19.2 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
19.3 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
19.4 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
19.5 Provide measured thermal data (e.g., thermal plot measurements) to show correlation to the calculated values OPEN
19.5.1 If thermal imaging is used to measure the PCB temperatures, an additional test with the module covers installed using thermal couples at key locations is required to determine total temperature rise. OPEN
20.0 BLDC Application
BLDC Row Status
RQT-191001-009988 EC-0240 WORST CASE CIRCUIT ANALYSIS Evidence Comment/Issues Open Date Close Date Ford HW TS Reviewer
20.1 Provide the worst-case stress analysis for power components listed below (If not covered elsewhere): OPEN
20.1.1 Use the following environmental conditions:
20.1.1.1 Maximum operating voltage (e.g., 16V, 19V, 54V, etc.) and maximum operating temperature (e.g., 75C, 85C, etc.) OPEN
20.1.1.2 " 19.95V & maximum operating temperature (e.g., 75C, 85C, etc.)" OPEN
20.1.1.3 " 27V & 55C" OPEN
20.1.1.4 " 30V (Load Dump) & maximum operating temperature (e.g., 75C, 85C, etc.)" OPEN
20.1.2 " Reverse polarity MOSFET "
20.1.2.1 " Power loss at maximum current" OPEN
20.1.2.2 " Maximum Tj" OPEN
20.1.3 " MOSFET´s for Motor Bridge "
20.1.3.1 " Power loss at maximum phase current" OPEN
20.1.3.2 " Conduction losses" OPEN
20.1.3.3 " Freewheeling diode losses" OPEN
20.1.3.4 " Switching losses" OPEN
20.1.3.5 " Maximum Tj " OPEN
20.1.3.6 " Voltage stress at Load Dump" OPEN
20.1.4 "VBAT Filter inductance"
20.1.4.1 " Power loss from RMS current" OPEN
20.1.4.2 " RMS current rating" OPEN
20.1.4.3 " Maximum Temperature rise" OPEN
20.1.5 "VBAT Filter Capacitor"
20.1.5.1 " Power loss from RMS current" OPEN
20.1.5.2 " RMS current rating" OPEN
20.1.5.3 " Maximum Temperature rise" OPEN
20.1.6 " Current Measurement Shunt resistor"
20.1.6.1 " Power loss from RMS current or RMS current rating" OPEN
20.1.6.2 " Maximum Temperature rise" OPEN
20.1.7 " Gate driver IC with integrated voltage regulator"
20.1.7.1 " Maximum current out of voltage regulator" OPEN
20.1.7.2 " Maximum Power loss of IC & Maximum Tj" OPEN
20.1.8 " VCC Current Boost Transistor"
20.1.8.1 " Power loss at maximum current" OPEN
20.1.8.2 " Maximum Tj" OPEN
20.1.9 PCB Traces
20.1.9.1 " Maximum Temperature rise" OPEN
20.2 Provide the worst-case stress analysis for signal components listed below (If not covered elsewhere):
20.2.1 Use the following environmental conditions:
20.2.1.1 Maximum operating voltage (e.g., 16V, 19V, 54V, etc.) and maximum operating temperature (e.g., 75C, 85C, etc.) OPEN
20.2.1.2 " 19.95V & maximum operating temperature (e.g., 75C, 85C, etc.)" OPEN
20.2.1.3 " 27V & 55C" OPEN
20.2.1.4 " 30V (Load Dump) & maximum operating temperature (e.g., 75C, 85C, etc.)" OPEN
20.2.2 Gate Resistors
20.2.2.1 Power loss from RMS current OPEN
20.2.2.2 Power derating OPEN
20.2.3 Boost Voltage Charging Diodes
20.2.3.1 Power loss OPEN
20.2.3.2 Maximum Tj OPEN
20.2.3.3 Peak current within ratings OPEN
20.2.4 Snubber Resistors
20.2.4.1 Power loss from RMS current OPEN
20.2.4.2 Power derating OPEN
20.3 Provide the worst-case analysis that shows how the component values of the following were determined:
20.3.1 Snubber R & C OPEN
20.3.2 Gate Boost Capacitors OPEN
20.3.3 IC VBAT Pin Capacitors OPEN
20.3.4 IC VG Pin (Gate Supply) Capacitors OPEN
20.3.5 Motor VBAT Bus Capacitors OPEN
20.3.6 VBAT Filter Capacitors OPEN
20.4 Provide the worst-case functional analysis of the circuits listed below
20.4.1 Functional over the required environmental range (provides the required transfer function) of module voltage and temperature. Include external ground offsets, harness or switch leakage resistances, harness connector and series wiring resistances, wiring capacitances, internal PCB trace resistances, internal common-mode voltage drops or offsets in the power and ground to the circuit, internal PCB leakage to adjacent potentials and any other parasitics. OPEN
20.4.1.1 Input thresholds OPEN
20.4.1.2 Transistors/FET's biasing (devices are ON/OFF as required) OPEN
20.4.1.3 Output levels to microprocessor or interfacing IC OPEN
20.4.1.4 Transfer function accuracy (e.g., duty cycle measurement, frequency measure, voltage measurement) OPEN
20.4.1.5 Input circuit loading resistances/capacitances per specifications OPEN
20.4.2 Circuits OPEN
20.4.2.1 " MOSFET´s for Motor Bridge " OPEN
20.4.2.2 Current Measurement Circuits OPEN
20.4.2.3 Phase Voltage Measurement Circuits OPEN
20.5 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
20.6 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
20.7 This item is reserved for a product specific item that may be added by WCCA reviewer. OPEN
20.8 Measurements
20.8.1 Device temperatures with worst-case loading OPEN
20.8.2 Items per latest level Hardware Review Checklist OPEN
