首揭FD-SOI（全耗尽型绝缘层上硅）技术- 大数跨境

芯华舍

2017-06-23

导读：近日，虚拟现实产业又正式迎来了一个重磅级新玩家。在WWDC2017全球开发者大会上，苹果正式宣布其Mac和i

来自格罗方德的首席技术官GaryPatton，为我们揭开了FD-SOI技术，与finFETs工艺对比，谁是最适合下一代缩放的技术。与行业半导体工程师主要讨论了FD-SOI技术、集成电路缩放、工艺技术以等话题，以下是此次谈话的内容：

SE:Inlogic,GlobalFoundriesisshipping14nmfinFETswith7nmintheworks.Thecompanyisalsoreadying22nmFD-SOItechnologywith12nmFD-SOIinR&D.WhydevelopbothfinFETsandFD-SOI?

Patton:Weareprovidingourcustomerswithtechnologythat’sreallyoptimizedfortheirapplications.Wearenottryingtofiteverybodyfromhigh-endserverstobattery-powereddevicesintoonetechnologyflavor.

SE:ThereissomeconfusionwhereFD-SOIandfinFETscompeteinthemarket.Canyouelaborate?

Patton:IamabigfanoffinFETs.Ispendalotofmytimeon7nm.Wearetryingtogetthatreadyforcustomertape-outsearlynextyear.It’sagreattechnologyifyouarefocusedonperformance.Ifyouaremakinglargechipsandyouhavealotofwirecapacitance,youlovethedrivecurrentofafinFETdevice.Butifyouaremakingsmallerchips,wherethegatecapacitanceisabiggerissue,thenthefinFEThasalittlebitofadisadvantage.Also,it’samuchmorecomplexprocess.Noteverybodyismakingamillionwafersfortheirproducts.It’samoreexpensiveprocess.Andithasmorecomplexitywithdouble-,triple-andquadruple-pattering,aswellasthecomplexitieswithRFandanalogdesigninafinFETdevice.

SE:WhataboutFD-SOI?

Patton:FD-SOIisreallyatechnologyoptimizedforthelow-costIoT,battery-powered,low-endmobileandautomotiveapplications.

SE:Doyoupushonetechnologyoveranother?Patton:We’reagnostic.We’renottellingcustomersthatyouhavetodofinFETsorFD-SOI.Wewantcustomerstousethetechnologythatfitstheirapplication.SE:Whoaretheearlyadoptersfor22nmFD-SOI?Patton:Automotiveisdefinitelyoneofthestrongones.Thecameraspaceisanother,andsomeofthebattery-poweredIoT.SE:What’shappeninginautomotive?Patton:CertainapplicationsinautomotivearebetteroptimizedforFD-SOIlikeradar.OtherapplicationsmayusefinFETs.SoweareactuallygoingthroughautomotivequalificationinourMaltafabfor14nm.Again,theautomakerscanchoose.SE:GlobalFoundrieshasannounced22nmFD-SOIwithplanstoaddmorecapabilitiestothetechnology,right?Patton:Thebasetechnologyisdone.ThebaseIPdevelopmentisdone.Andnow,weareworkingontheextensions.Webelieveoneofthekillerapplicationsforthisistobeabletodoasingle-chipsolutionfortheIoTspace.That’sRFandeverything.SE:WhatelseareyoudoingwithFD-SOI?Patton:There’sembeddedmemory.WehaveMRAM,whichwewillbringin.And,ofcourse,wehave12nmworkgoingon.

Fig.1:BulkCMOSvsFD-SOI.Source:GlobalFoundries

Fig.2:7nmfinFET.Source:GlobalFoundries

SE:ThereisaperceptionthatonlyafewcustomershaveadoptedFD-SOI.WhatarethechallengesofgettingmoreadoptionforFD-SOI?Patton:We’veworkedwithleadcustomersonFD-SOIandtheynowunderstandtheissues.First,therewasthehistoryorconcernsaboutexecution.Wearewellpastthat.Peopleunderstand22nm.It’ssolidtechnologyandit’syieldingverywell.We’veexecutedwhatwe’veplanned.WeknewIPwasgoingtobecritical,becauseFD-SOIisnewanddifferentforpeople.Sowe’vebeeninvestingfromthebeginningontheIPecosystem.OurinitialpartnerwasInvecastohelpbuildupthefoundationalIP.Sincethen,we’vemadeabigincreaseandinvestmentinalloftheIParoundthetechnology.SE:Whatelse?Patton:Bytheway,there’smulti-sourcing.WehaveafabcomingupinChengdu,China.Also,weknowChinawillbeabigmarketforFD-SOI.That’sbeenprettyclearfromtheconversionswe’vehadwithcustomersinChina.So,wewillhavetwobigfactoriesforFD-SOI—DresdenandChengdu.SE:SomeanalystssayyouneedmoreICdesignresourcestomakechipsaroundFD-SOI,ascomparedtobulkCMOS.Isthatthecase?Patton:That’ssomeoftheFUD(fear,uncertaintyanddoubt)spreadbyourcompetitors.Wehaveprogramstohelpteachourcustomershowtouseback-bias.Anumberofthemarestartingoutwithoutback-bias.Theygetthatundertheirbelt,andthentheycantaketheproducttothenextlevelbyusingback-bias.Someofourecosystempartnersareputtingthetoolsinplace,sothatit’sfairlyeasytodesignwithback-bias.Youdohavetothinkabouthowyouwanttoarchitectthesystem.That’swheretheyprovidetheirvalueintermsofdifferentiationandfiguringouthowtheywanttoleveragethisthingcalledbody-biasatacircuit,blockorchiplevel.

Fig.3:Whatisbody-bias?

SE:Whatabout12nmFD-SOI?Whynotofferthatat10nm?Patton:It’sstillplanarandwehavetogotodoublepatterning.10nmisarepeatofhistoryon20nm.10nmtakesthingsjusttothepointwhereyouneedtriplepatterning.Andsowebackedoffalittleinscalingwithabigmaskcostreduction.Wedon’tinvokeasmanydouble-ortriple-patterninglevels.Soifyoucompareitto10nm,12nmFD-SOIis40%lessmasks.Andour22nmisabout40%lessmasksthan14nm/16nm.SE:ThereisalsoaperceptionthatFD-SOIsuffersfromhighersubstratecosts.Anythoughts?Patton:That’sonlypartoftheequation.Whenyougetabigmaskcostsavings,youaresavingetchsteps,depositionstepsandothers.Itcompensatesforit.

SE:Let’smovetochipscaling.IstheindustrykeepingupwithscalingorMoore’sLaw?

Patton:Itusedtobesimple.Theindustrywasscaling50%andwouldadd10%or15%complexityfora30%to35%diecostimprovement.Butnowyouareadding25%complexity.Let’sjustpickthatasanumber.Now,youareonlygettinga20%diecostimprovement.That’snotquiteasexcitingforsomebodydoingdesign,especiallyifyoulookatthecurvesondesigncosts.Designcostshavebeengoingupatanexponentialrate,sopeoplehavetospendmoretodesigninthisnewtechnology.SE:WhataboutGlobalFoundries’7nmtechnology?Patton:Our7nmisscaled,versus14nm,about0.37x.Wealsoknowtherearemoremasksthan14nm.Attheendoftheday,whenyoutaketheshrinkageandthecomplexityincrease,wearegivingcustomersagooddiecostimprovementfortheinvestmenttheyaregoingtomakeinthedesign.

Fig.4:Keyinnovationsfor7nm.Source:GlobalFoundries

SE:GlobalFoundriesdecidedtoskip10nmandmoveto7nm.Why?Patton:Thescalingfactorfor10nmisprettymodest.It’smoreofahalfnode.Allthethingswe’veheardfromcustomersistheperformanceimprovementfor10nmisprettymarginaloverthepreviousnodein16nm/14nm.Sofor7nm,ifyoulookatscalingandcost,it’shittingthatcosttargetof30%to35%diecostimprovement.SE:Whatarethebigchallengesfor7nm?Patton:Clearly,thecomplexityisrightupthere.Youaretalkingaboutsomethinginthemid-80sformaskcount,whichisprettyamazing.Themiddle-of-lineisalsoakeychallengingarea.Gettingtotheperformancetargetisthethirdkeychallenge.SE:For7nm,GlobalFoundriessaiditwouldinitiallyuse193nmimmersionandmultiplepatterning,andnotEUV.Isthatstillthecase?Patton:Yes,definitely.Wehaveanumberofproductstapingoutnextyear,includingthefirstoneintheearlypartofnextyear.AndEUVisnotreadyonthattimeframe.WedohaveEUVtoolscomingintoMalta.Wewanttobepreparedforthetransitionbecauseitclearlyoffersadvantages.WehavetwoEUVtoolscominginnextyear,andthenwewillhaveanothertwotoolscomingintheyearafter.SowewillbewelloutfittedwithEUVtooling.WehaveourEUVtool,ofcourse,inAlbany,whichweareusingwithIBMfordevelopment.FormanufacturingwewillhaveEUVcapabilityinplace.Andthenwewilltransitioncustomersandproductsovertothatwhenit’sready.Itwillgiveusacycletimeandadefectdensityimprovement.Andwe’lluseitforashrinkon7nm.SE:SoyouplantoinsertEUVat7nmatsomepoint?Patton:Wewilllaunch7nmwithimmersion.WewillmakesureourgroundrulesarecompatibleinordertomigratelevelstoEUV.Andthen,we’lllookatashrinkonthatattherighttime.SE:Whataboutthefinsat7nm?Doyouneedtomakethemtallertoboostthedrivecurrents?Patton:We’vegoneabittallerwiththefins.Therearesomedisadvantagesofgoingtotallerfins,aswell.Thefinshapeisprobablythemostcriticalone.Gettingthefinprofileshapeiscritical.Also,gettingthatjunctionisolationiskey.Yourfinisisolated,butifyougettoomuchoverlaptothesource-drain,itaddsalotofcapacitance.Thisslowsdownthetransistor.SE:IsGlobalFoundriesco-developing7nmtechnologywithSamsung?Patton:Wearedoingitcompletelyonourown.Wehadthecollaborationon14nm.WestillpartnerwiththemonwhatI’dcallpathfindinginAlbany.AspartofthedealwithIBM,Albanyusedtobeanall-joint-developmentalliance.Thenitwasspiltintotwoparts.Halfofthefacilitycontinuestodothejointdevelopmentwork,whichIBMleads.Thinkofthataspathfindingfor5nmandbeyond.AndtheotherhalfisaproprietaryIBM-GlobalFoundriescorridor,whichisspecificallyfocusedonacceleratingthingsintoMalta.Thosecouldbeperformanceelementsfor7nmand7nmplus.Infact,Iwouldenvisionwe’llhaveabunchofperformancekickersat7nm.Thiswillbealongnode.

SE:SothefinFETwilllastatleastuntil7nm.Whatabout5nm?Patton:Wehaveworkgoingonthat.Wehaveworkinnewdevicestructureslikegate-all-aroundinAlbany.Somethinkthatyoucangoto3nmwithfinFETs.Iamabitskepticalonthattopic.Wewillneedsomenewdevicestructuresbeforethen.

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