提醒：文章后半部分为机器翻译的中文版本，请谨慎阅读。
Top Ten Fallacies About RISC-V
By David PattersonMarch 22, 2023
David Patterson, Pardee Professor of Computer Science, Emeritus at UC Berkeley
and Vice Chair of the RISC-V International Board of Directors
Following the Fallacies and Pitfalls section in every chapter of Computer Architecture: A Quantitative Approach, this paper gives ten fallacies about RISC-V today (below). We next explain the flaws of these fallacies.
RISC-V is an open-source processor, like Linux is an open-source operating system.
All RISC Instruction Set Architectures (ISAs) are equivalent.
Picking an established, closed ISA is a safer business decision than picking the new open RISC-V.
RISC-V ISA is only gaining popularity because it’s cheaper.
Closed ISAs do not have fragmented software ecosystems.
RISC-V modularity leads to a more fragmented software ecosystem than those of closed ISAs.
RISC-V is only good for embedded applications.
RISC-V is not as secure as a closed ISA.
RISC-V processors will always trail the more established closed processors in high performance and robustness of the software ecosystem.
Given the points above, RISC-V cannot become the dominant ISA.
1. Fallacy: RISC-V is an open-source processor, like Linux is an open-source operating system.
Linux has a single master open-source code base you can download, while RISC-V is an open specification of the hardware/software interface for which there are many different implementations. A better analogy than Linux is Ethernet, since both Ethernet and RISC-V are free and open specifications.
Before the Ethernet standard, companies had their own proprietary local area networks (LANs): Apple AppleTalk (1985), Datapoint ARCNET (1977), Digital Equipment Corporation DECnet (1975), IBM Token Ring (1984), Xerox Ethernet (1974), and so on. In 1980 Digital Equipment Corporation, Intel, and Xerox (“DIX”) joined forces to create a local network standard based on Ethernet. They also created an organization—IEEE 802.3 working group—that has advanced the Ethernet standard over the past four decades.
Ethernet made rapid advances in cost and performance because many companies could build network products that ran the same software stack on top of the Ethernet standard. While you can design your own Ethernet switches and there could be open hardware designs to download, many simply buy switches that meet the Ethernet standard. A decade after the creation of the “DIX” standard, Ethernet became the dominant networking technology. Today, proprietary LANs are practically extinct. Does anyone miss them?
The popular Universal Serial Bus (USB) also followed the Ethernet game plan by providing a free and open standard for peripheral interconnect that is embraced by many companies plus an organization to evolve it.
Like Ethernet and USB, RISC-V is an open standard that lets many organizations design hardware, which fosters competition to improve its cost-performance and develop a rich shared software ecosystem that offers RISC-V products in many markets. Like Ethernet and USB, RISC-V also has a foundation that evolves the standard over time to meet new demands. Like Ethernet and USB, you can buy RISC-V hardware, build it yourself, license designs, or download open-source designs.
2. Fallacy: All RISC Instruction Set Architectures (ISAs) are equivalent.
While RISC architectures share some characteristics, RISC-V has unique features compared to previous ISAs, in part because it is newer and in part because of the philosophy of its architects. These features led the EU to pick RISC-V for its processor initiative and NASA to pick RISC-V for future space missions.
RISC-V has a small core set of instructions that all software runs on, plus optional extensions that processor designers and compilers can choose to use. Thus, RISC-V designs can be smaller and use less energy as they can omit features when they are unnecessary. Profiles provide standard targets for particular segments (see Fallacy 7).
RISC-V also provides a few features not found in another popular RISC ISA, the ARMv8 and its successors:
RISC-V supports the addition of custom instructions to accelerate an application. Examples are applications for machine learning or for digital signal processing.
RISC-V offers compact instructions that reduce code size. The same-sized instruction cache can store ~50% more RISC-V instructions, which reduces cache misses and therefore clocks per instruction (CPI).
RISC-V has a single compare and branch instruction vs two instructions (set condition codes, then branch on them). Conditional branches are 10%-20% of instructions executed, so the savings are significant.
3. Fallacy: Picking an established, closed ISA is a safer business decision than picking the open RISC-V.
It’s easy to forget that a closed ISA is tied to the success of the company that owns them, and it can disappear if the company falters. For example, the once-popular DEC VAX, DEC Alpha, and Sun SPARC ISAs are extinct.
It’s also hard to remember that closed ISAs are intellectual property that can be sold to companies with different goals than its predecessors. For example, the MIPS ISA has had more than a half-dozen owners, and so far the Arm ISA has had three: Acorn, ARM Holdings plc, and Softbank. By comparison, RISC-V is driven by the collective participation of hundreds of companies in a neutral open standard organization, RISC-V Inter- national. Their collective interests determine the evolution of RISC-V through this non-profit foundation.
Like Ethernet and USB, RISC-V is not tied to the fortunes of any one company, so it is a more prudent bet for a company’s software ecosystem development for the long haul. This long-term safety is another reason the EU and NASA picked RISC-V for their future plans.
4. Fallacy: The RISC-V ISA is only gaining popularity because it’s cheaper.
First, there are other reasons besides being cheaper to explain RISC-V’s popularity. Fallacies 2 and 3 above point out the advantages of RISC-V independent of cost. Beyond the advantages in the ISA itself, being an open standard means more organizations will be designing hardware for the open specification than for any other (like Ethernet or USB), which should lead to better versions of RISC-V cores than cores designed by a handful of organizations. Thus, the ISA’s advantages and the larger developer community likely means better performance- power-area for RISC-V processors than for conventional ISAs. Finally, like Ethernet or USB, the many suppliers of RISC-V mean one can start a project before signing a contract or NDA, which can take months to negotiate. Thus, picking RISC-V (or Ethernet or USB) could save development time even if there was no cost benefit.
If you want to design your own hardware, RISC-V is indeed cheaper since the specification is free and open; there is no architecture license fee, which can cost tens of millions of dollars for closed specifications. Since the spec is open, there are also free open source examples you can download, use, and modify, which is not an option for closed ISAs. If licensing a design, the open specification means you have your choice of multiple commercial vendors and implementations. Compared to single source designs, competition generally reduces prices.
While there may be cost advantages, RISC-V is gaining popularity primarily because of the design freedom inherent in its business and technical model. This benefit ensures that stakeholders can rapidly create competitive solutions using resources from a variety of mutually invested partners while avoiding vendor lock-in.
5. Fallacy: Closed ISAs do not have fragmented software ecosystems.
Older closed ISAs have suffered from unforeseen incompatibilities over their long lifetimes. Here are a few examples:
Despite trying to share the x86-64 ISA, AMD and Intel require different virtual machines.
Intel AVX-512 is significantly fragmented.
ARM compilers use many runtime tests to see if SIMD features are available before using them.
ARM1 to ARMv7 use a 32-bit address space but they are incompatible with ARMv8-A and successors, which offer both 32- and 64-bit address versions. ARMv8-M adds new features to the older 32-bit ISA, but is incompatible with ARMv8-A.
No software environment is more fragmented than today’s system on a chip (SOC) for edge devices. They include many incompatible ISAs and software stacks for the many types and brands of processors (application CPUs, embedded CPUs, DSPs, ML accelerators and ISPs). One reason is because these processors use closed ISAs that cannot be used for third party IP, so each processor block has its own ISA.
6. Fallacy: RISC-V’s modularity leads to a more fragmented software ecosystem than those of closed ISAs.
This fallacy has been raised since we first started advocating for RISC-V, so it’s not been neglected. Some market segments require a stable ISA and even binary compatibility, which RISC-V addresses with profiles. They specify a set of ISA choices from the standard extensions that capture the most value for most users in a market, enabling the software community to focus resources on building an appropriate software ecosystem. Similarly, hardware vendors structure their offerings around standard profiles to ensure their designs will have mainstream software support. For example, RISC-V offers them for 64-bit address UNIX systems. Profiles are the foundation upon which portable apps and OSes can be built.
Beyond profiles, the RISC-V ISA offers the exciting possibility of a common base ISA with custom enhancements and a shared software stack across the many processors of an SOC. RISC-V potentially could dramatically reduce the fragmentation of today’s SOC software ecosystems (see Fallacy 5 above).
7. Fallacy: RISC-V is only good for embedded applications.
The most successful initial market for RISC-V has been embedded computers; they leverage the RISC-V modularity and customizability to improve performance-power-area, have the simplest software stack, and have more greenfield opportunities. Even if the fallacy were true, embedded/IOT is an exciting market that enables new gadgets that we all rely upon everyday. This segment represents 90% of the processors shipped annually and has revenues comparable to the server market.
However, even a casual glance at RISC-V International’s membership suggests that companies are already developing RISC-V products in other markets, such as aerospace, automotive, high-performance computing, and data centers.
The history of Ethernet may be instructive about the future of RISC-V. Many networking standards have been proposed to replace Ethernet in new markets (e.g., ATM, FDDI, and Infiniband), yet Ethernet is used everywhere today, from 1 gigabit to 400 gigabit links and switches; it is the lingua franca of networking.
Similarly, RISC-V has the chance to become the lingua franca for computing, offering the same base ISA from the smallest embedded device to the largest supercomputers, plus extensions that tailor it to different markets.
8. Fallacy: RISC-V is not as secure as a closed ISA.
One advantage of an open ISA is that experts in many fields and in many organizations can participate in the design of new features before they are finalized. One of the most active committees in the RISC-V community is the security special interest group, which has been developing many security features for RISC-V, including cryptographic extensions and trusted execution environments. This progress is a reason that RISC-V is becoming popular in markets with more emphasis on security, from SOCs to disk drives, automotive, and even legacy boot cores.
9. Fallacy: RISC-V processors will always trail the more established closed processors in high performance and robustness of the software ecosystem.
The competitors to the Ethernet standard surely raised this same fallacy in the early 1980s. While the older closed ISAs have a head start, like the early days of Ethernet we believe the gap will close as more hardware and software companies realize the benefits of embracing a free and open ISA standard (see Fallacy 7). RISC-V lets companies both diversify their business interests and invest in technologies ahead of the life cycle curve. For example, MIPS now offers RISC-V designs to supplement the ISA for which it is best known. For software companies, the ability to run on different hardware platforms is an opportunity to participate in multiple markets, thus spurring investment and adoption.
In summary, it is too expensive for most companies to develop or own an architecture and ultimately have the sole responsibility for a robust software, regardless of community or dedicated third party efforts. RISC-V addresses that by the community owning this by definition, which allows companies to innovate, not duplicate.
10. Fallacy: Given the points above, RISC-V cannot become the dominant ISA.
We believe the above points are fallacies, they can’t really block the growth of RISC-V.
There is no technical disagreement that a single base ISA could be used everywhere from embedded systems to supercomputers; the main argument is a business one, of whether it should be a closed ISA or an open ISA. If we do achieve a lingua franca for computing, it seems self-evident that it would be too dangerous for the fate of the entire information technology industry to be tied to the fortunes of a single company. It would be much safer if we could instead depend upon a free and open standard, just as we did for networking and peripheral interconnect.
In a little over a decade, RISC-V has arguably become at least the third most important ISA for future applications of computing. The enthusiasm for an open ISA that we see across the industry reminds those of us old enough to remember of the groundswell for an open networking standard in the early days of the standardization of Ethernet. In the next few years it may become just as surprising to pick a proprietary ISA over the open RISC-V for a new project as it would to pick a closed alternative to Ethernet or USB.
Just as the free and open Ethernet is the dominant network and the free and open USB is the dominant external peripheral interconnect, we predict that by the end of this decade the dominant ISA for future product development will be the free and open RISC-V.
Digital, Intel and Xerox, 1980. The Ethernet, A Local Area Network. Data Link Layer and Physical Layer Specifications.
While the 32-bit ARMv3 to ARMv7 ISAs offer compact instructions, the 64-bit ARMv8 and successor ISAs do not.
See Processor compatibility mode in Hyper-V.
The last table in the AVX-512 wikipedia page shows the haphazard use of features, e.g., Cooper Lake (2020) and Zen 4 (2022) have BFloat16 arithmetic, but not Ice Lake (2019), Tiger Lake (2020), Alder Lake (2021), or Rocket Lake (2021).
Asanović and D. Patterson, August 2014. Instruction sets should be free: The case for RISC-V.
RISC-V Profiles, https://github.com/riscv/riscv-profiles/blob/main/profiles.adoc.
Profiles are compatible with the inclusion of custom instructions, which are typically invoked via optimized libraries.
Slovick, The Automotive Space Gears Up to Take on RISC-V, Sept. 26, 2022, Electronic Design.
Mann, China may prove Arm wrong about RISC-V’s role in the datacenter, Oct. 5, 2022, The Register.
As long as an ISA has 32-bit address and 64-bit address versions, which RISC-V and many other ISAs offer.
关于RISC-V的十大谬误
2023年3月22日
David Patterson，加州大学伯克利分校计算机科学教授，名誉教授
RISC-V国际董事会副主席
本文给出了当今关于RISC-V的十个谬误（如下）。接下来，我们将解释这些谬误。
RISC-V是一个开源处理器，就像Linux是一个开源操作系统一样。
所有RISC指令集架构（ISA）都是等效的。
选择已建立的、封闭的ISA比选择新的开放RISC-V更安全。
RISC-V ISA越来越受欢迎，因为它更便宜。
封闭式国际检索协议没有分散的软件生态系统。
RISC-V模块化导致软件生态系统比封闭式ISA更加分散。
RISC-V只适用于嵌入式应用。
RISC-V不如封闭的ISA安全。
RISC-V处理器在软件生态系统的高性能和稳健性方面将始终落后于更成熟的封闭式处理器。
鉴于上述几点，RISC-V不能成为占主导地位的ISA。
1. 谬误：RISC-V 是一个开源处理器，就像 Linux 是一个开源操作系统一样。
Linux有一个单一的主开源代码库，你可以下载，而RISC-V是 硬件/软件接口的开放规范，有许多不同的实现。 比Linux更好的类比是以太网，因为以太网和RISC-V都是自由和开放的规范。
在以太网标准出现之前，公司拥有自己的专有局域网（LAN）：Apple AppleTalk（1985），Datapoint ARCNET（1977），Digital Equipment Corporation DECnet（1975），IBM Token Ring（1984），Xerox Etherety（1974）等。1980年，数字设备公司，英特尔和施乐（“DIX”）联手创建了基于以太网的本地网络标准。他们还创建了一个组织 - IEEE 802.3工作组 - 在过去四十年中推进了以太网标准。
以太网在成本和性能方面取得了快速进步，因为许多公司可以在以太网标准之上构建运行相同软件堆栈的网络产品。虽然您可以设计自己的以太网交换机，并且可以下载开放的硬件设计，但许多人只是购买符合以太网标准的交换机。在“DIX”标准创建十年后，以太网成为主导的网络技术。今天，专有局域网几乎已经灭绝。有人想念他们吗？
流行的通用串行总线（USB）也遵循以太网游戏计划，为外围互连提供免费和开放的标准，许多公司和组织都接受了该标准来发展它。
与以太网和USB一样，RISC-V是一种开放标准，允许许多组织设计硬件，从而促进竞争以提高其成本效益并开发丰富的共享软件生态系统，在许多市场中提供RISC-V产品。与以太网和USB一样，RISC-V也有一个基础，随着时间的推移，标准会不断发展以满足新的需求。与以太网和USB一样，您可以购买RISC-V硬件，自己构建，许可设计或下载开源设计。
2. 谬误：所有RISC指令集架构（ISA）都是等效的。
虽然RISC架构具有一些共同特征，但与以前的ISA相比，RISC-V具有独特的功能，部分原因是它较新，部分原因是其架构师的理念。这些功能导致欧盟选择RISC-V作为其处理器计划，而NASA选择RISC-V用于未来的太空任务。
RISC-V有一小群核心指令，所有软件都可以运行，以及处理器设计人员和编译器可以选择使用的可选扩展。因此，RISC-V设计可以更小，使用更少的能源，因为它们可以在不必要的功能时省略功能。配置文件为特定细分市场提供标准目标（参见谬误 7）。
RISC-V还提供了一些在另一个流行的RISC ISA，ARMv8及其后续产品中没有的功能：
RISC-V支持添加自定义指令来加速应用。例如机器学习或数字信号处理的应用程序。
RISC-V提供紧凑的指令，可减小代码大小。相同大小的指令缓存可以存储~50%以上的RISC-V指令，从而减少缓存未命中，从而减少每条指令的时钟（CPI）。
RISC-V有一个比较和分支指令与两个指令（设置条件代码，然后在它们上分支）。条件分支是执行指令的10%-20%，因此节省的成本是显着的。
3. 谬误：选择一个已建立的、封闭的ISA比选择开放的RISC-V更安全。
人们很容易忘记，封闭的ISA与拥有它们的公司的成功息息相关，如果公司步履蹒跚，它可能会消失。例如，曾经流行的DEC VAX，DEC Alpha和Sun SPARC ISA已经灭绝。
同样很难记住，封闭式ISA是可以出售给与其前身目标不同的公司的知识产权。例如，MIPS ISA已经有超过六个所有者，到目前为止，Arm ISA有三个：Acorn，ARM Holdings plc和Softbank。相比之下，RISC-V是由数百家公司在一个中立的开放标准组织RISC-V Inter-national中的集体参与推动的。他们的集体利益决定了RISC-V通过这个非营利基金会的发展。
与以太网和USB一样，RISC-V与任何一家公司的命运无关，因此对于公司的软件生态系统长期发展来说，这是一个更谨慎的赌注。这种长期安全性是欧盟和美国宇航局选择RISC-V作为其未来计划的另一个原因。
4. 谬误：RISC-V ISA 只是因为它更便宜而越来越受欢迎。
首先，除了更便宜之外，还有其他原因可以解释RISC-V的受欢迎程度。上面的谬误2和3指出了RISC-V与成本无关的优势。除了ISA本身的优势之外，作为开放标准意味着更多的组织将为开放规范设计硬件，而不是任何其他硬件（如以太网或USB），这应该会导致RISC-V内核的版本比少数组织设计的内核更好。因此，ISA的优势和更大的开发人员社区可能意味着RISC-V处理器的性能功耗区域优于传统ISA。最后，像以太网或USB一样，RISC-V的许多供应商意味着人们可以在签署合同或NDA之前启动一个项目，这可能需要几个月的谈判时间。因此，选择RISC-V（或以太网或USB）可以节省开发时间，即使没有成本效益。
如果你想设计自己的硬件，RISC-V确实更便宜，因为规范是免费和开放的;没有架构许可费，封闭规范可能花费数千万美元。由于规范是开放的，因此您还可以下载、使用和修改免费的开源示例，这对于封闭的 ISA 来说不是一个选项。如果许可设计，开放规范意味着您可以选择多个商业供应商和实现。与单一来源设计相比，竞争通常会降低价格。
虽然可能存在成本优势，但RISC-V越来越受欢迎，主要是由于其业务和技术模型中固有的设计自由度。这一优势确保利益相关者可以利用来自各种共同投资合作伙伴的资源快速创建有竞争力的解决方案，同时避免供应商锁定。
5. 谬误：封闭的ISA没有碎片化的软件生态系统。
较旧的封闭式《国际审计准则》在其漫长的生命周期中遭受了不可预见的不兼容。以下是一些示例：
尽管试图共享x86-64 ISA，但AMD和英特尔需要不同的虚拟机。
英特尔 AVX-512 非常分散。
ARM 编译器使用许多运行时测试来查看 SIMD 功能在使用之前是否可用。
ARM1 到 ARMv7 使用 32 位地址空间，但它们与提供 8 位和 32 位地址版本的 ARMv64-A 和后续版本不兼容。ARMv8-M 为较旧的 32 位 ISA 添加了新功能，但与 ARMv8-A 不兼容。
没有哪个软件环境比当今用于边缘设备的片上系统 （SOC） 更加分散。它们包括许多不兼容的 ISA 和软件堆栈，适用于许多类型和品牌的处理器（应用程序 CPU、嵌入式 CPU、DSP、ML 加速器和 ISP）。一个原因是因为这些处理器使用不能用于第三方 IP 的封闭 ISA，因此每个处理器块都有自己的 ISA。
6. 谬误：RISC-V的模块化导致软件生态系统比封闭式ISA更加分散。
自从我们第一次开始倡导RISC-V以来，这个谬误就已经提出来了，所以它并没有被忽视。一些细分市场需要稳定的ISA甚至二进制兼容性，RISC-V通过配置文件解决了这个问题。 它们从标准扩展中指定了一组 ISA 选择，这些选项为市场中的大多数用户获取最大价值，使软件社区能够将资源集中在构建适当的软件生态系统上。 同样，硬件供应商围绕标准配置文件构建其产品，以确保其设计具有主流软件支持。例如，RISC-V为64位地址UNIX系统提供了它们。配置文件是构建便携式应用程序和操作系统的基础。
除了配置文件之外，RISC-V ISA还提供了令人兴奋的可能性，即具有自定义增强功能和跨SOC的许多处理器的共享软件堆栈的通用基础ISA。 RISC-V可能会大大减少当今SOC软件生态系统的碎片化（参见上面的Fallacy 5）。
7. 谬误：RISC-V只适用于嵌入式应用。
RISC-V最成功的初始市场是嵌入式计算机;他们利用RISC-V模块化和可定制性来提高性能功耗，拥有最简单的软件堆栈，并拥有更多的绿地机会。即使谬论是正确的，嵌入式/物联网也是一个令人兴奋的市场，它使我们每天都依赖的新产品成为可能。该细分市场占每年出货处理器的90%，其收入与服务器市场相当。
然而，即使不经意地看一眼RISC-V国际的成员资格，也表明公司已经在其他市场开发RISC-V产品，如航空航天，汽车，高性能计算和数据中心。
以太网的历史可能对RISC-V的未来具有启发性意义。已经提出了许多网络标准来取代新市场中的以太网（例如，ATM，FDDI和Infiniband），但以太网如今无处不在，从1千兆位到400千兆位链路和交换机;它是网络的通用语言。
同样，RISC-V有机会成为计算的通用语言，提供从最小的嵌入式设备到最大的超级计算机的相同基础ISA，以及针对不同市场量身定制的扩展。
8. 谬误：RISC-V不如封闭的ISA安全。
开放式 ISA 的一个优点是，许多领域和许多组织的专家可以在新功能最终确定之前参与设计。RISC-V社区中最活跃的委员会之一是安全特别兴趣小组，该小组一直在为RISC-V开发许多安全功能，包括加密扩展和可信执行环境。这一进步是RISC-V在更加重视安全性的市场中越来越受欢迎的一个原因，从SOC到磁盘驱动器，汽车，甚至传统的引导核心。
9. 谬误：RISC-V处理器在软件生态系统的高性能和健壮性方面将始终落后于更成熟的封闭处理器。
以太网标准的竞争对手在 1980 年代初期肯定提出了同样的谬误。虽然较旧的封闭式ISA有先机，但就像以太网的早期一样，我们相信随着越来越多的硬件和软件公司意识到采用自由和开放的ISA标准的好处，差距将会缩小（见谬误7）。RISC-V使公司既能实现商业利益多元化，又能在生命周期曲线之前投资技术。例如，MIPS现在提供RISC-V设计来补充其最知名的ISA。对于软件公司来说，在不同硬件平台上运行的能力是参与多个市场的机会，从而刺激投资和采用。
总之，对于大多数公司来说，开发或拥有架构并最终对强大的软件承担全部责任的成本太高，无论社区或专门的第三方努力如何。RISC-V通过定义解决拥有它的社区，这允许公司创新，而不是复制。
10. 谬误：鉴于上述几点，RISC-V不能成为占主导地位的ISA。
我们认为以上几点是谬论，它们不能真正阻止RISC-V的增长。
从嵌入式系统到超级计算机，单一基础ISA可以在任何地方使用，这在技术上没有分歧;主要论点是商业论点，即它应该是封闭式ISA还是开放式ISA。如果我们真的实现了计算通用语言，那么似乎不言而喻的是，整个信息技术行业的命运与一家公司的命运联系在一起太危险了。如果我们能够依赖自由和开放的标准，就像我们在网络和外围互连方面所做的那样，那将更加安全。
在十多年的时间里，RISC-V可以说至少成为未来计算应用中第三重要的ISA。我们在整个行业看到的对开放ISA的热情提醒了我们这些年龄足够大的人，他们记得在以太网标准化的早期，开放网络标准的风潮。在接下来的几年里，为新项目选择专有的ISA而不是开放的RISC-V可能会变得令人惊讶，就像选择以太网或USB的封闭替代品一样。
正如自由开放的以太网是主导网络，自由开放的USB是主要的外部外围互连一样，我们预测，到本十年末，未来产品开发的主导ISA将是自由开放的RISC-V。