JOB | 上海 - Design Verification Expert

国际知名无线技术的领军企业招聘Low Power ASIC方向的Design Verification Expert，工作地点在上海，需要一定的工作经验哦～

- Assist in complete verification of high performance, high feature, low power ASIC.

- Work closely with system architect and design managers to architect low power design verification environment and produce high quality verification closure.

- Guide the development of comprehensive, flexible, and portable block to chip level test-benches, detail test plans and coverage closure.

- Infrastructure work including developing scripts, methodologies and tools for efficiency and quality improvements. 

- Understand the low power trade-offs of different retention methods, power collapsing and control, including but not limited to the implication on technology nodes and DFT.

- Strong verification and technical lead skills including a good knowledge and understanding of different verification methodologies: architecture vs micro-architecture level random vs directed testing full chip vs module-level performance vs function error & drop handling power modes & their effects Past experience of successfully technically guiding complex, multi-million gates, high speed, low power design verification.

- Experience with the following areas in design and verification: Advanced Constrained-random functional verification methodology such as OVM/UVM/VMM and/or SV Assertion.

- Systems using communication systems/protocols such as 802.3, PCIe, USB3, 802.11, ARM and their low power modes and system effect.

- Formal verification with abstraction model for end-to-end checking.

- Low power verification methodologies and quality measurements.

- Debug methodology

- Self-motivated, good communicator, quick learner and good team player.

- Display positive attitude and demonstrate flexibility in day-to-day work.

- MS/EE or CS with 8-12 years of relevant experience.