JOB|招聘FPGA工程师、算法工程师、和AI领域人才

Location:

Santa Clara, CA

工作内容：

The candidate will create FPGA models from Verilog HDL using FPGA synthesis, partitioning and routing tools, test/debug the FPGA models and develop software/scripts to improve the debugging efficiency. Candidate will help in bring up, regression of tests, OS, etc. on FPGA platform.

技能要求：

• Hands on experience in FPGA designs using Verilog HDL

• Hands on experience in FPGA/board debugging

• Familiarity with Xilinx tools, Vivado, Chipscope

• Proficiency in Mandarin

Location:

Bridgewater, NJ

工作内容：

•The candidate is expected to play an active role in computer vision technology development and implementation.

•Under the supervision of a senior scientist/researcher or project leader to conduct R&D work in the areas of advanced computer vision/media processing technology.

技能要求：

•Ph.D or Master degree in relevant discipline/field, such as EE or CS.

• Strong programming skills in C / C++ for both Windows and Linux is a must

•Ample hands-on experience with OpenCV is a strong plus

•High proficiency and good experience with Android programming is a big plus.

•Good programming skills in Java and Python is also a plus

• 3+ years algorithm R&D experiences in the areas of computer vision, information retrieval, machine learning, media processing, and related fields with proven track record.

• Good communication skills, both verbal and written

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2905 Stender Way, STE42, Santa Clara, CA 95054

Tel: (408)200-9891